1. Field of the Invention
This invention is a device for synchronizing an input data stream which consists of an antipodal pattern, i.e., where the data has one of two states which can be represented as values above and below a reference axis. Thus, the device has applicability in biphase shift keying and frequency shift keying receivers. It can also be used with multiple input streams when such streams are synchronized, e.g., in QPSK modulated signals.
2. Description of the Prior Art A prior art search was conducted but uncovered no patents for bit synchronizers using early and late gating and the use of an up/down counter as a statistical averager, as in the present invention.